The present invention relates to a semiconductor device and a method for fabricating the same, more specifically to a semiconductor device including an electrical contact connected to a damascene interconnection, and a method for fabricating the same.
As semiconductor devices are larger-scaled and integrated higher, design rules of the interconnections are diminished as the generations. Conventionally, interconnections have been formed by depositing conducting materials and patterning the deposited conducting materials by lithography and dry etching. However, as the generations advance, this has found technical limitations. As a new process for forming the interconnections, which takes over the conventional process for forming the interconnections, the so-called damascene process, in which groove patterns and hole patterns are formed in an inter-layer insulating film, and a conducting material is buried in the grooves and the holes, is becoming prevalent.
The damascene process can be applied not only to forming metal interconnections of materials, such as copper, etc., which are difficult to be dry etched, but also to forming fine interconnections, such as local interconnections, etc., to be connected to a silicon substrate or a gate interconnection. In the semiconductor device described, e.g., in Japanese published unexamined patent application No. 2002-217316, the damascene interconnections are used as local interconnections of SRAM cells.
However, in contacting an upper interconnection layer to a lower damascene interconnection layer, contact failures, such as increases of the contact resistance, the disconnection of the interconnection, etc., often take place.